Fast growth of the pervasive computing and handheld/communication industry generates exploding demand for high capacity nonvolatile solid-state data storage devices. However, flash memory has several drawbacks such as slow access speed (˜ms write and ˜50-100 ns read), limited endurance (˜100K programming cycles), and the difficulty of integration in system-on-chip (SoC). Flash memory (NAND or NOR) also faces significant scaling problems at 32 nm node and beyond.
Magnetic Random Access Memory (MRAM) is a promising candidate for future nonvolatile and universal memory. MRAM features non-volatility, fast writing/reading speed (<10 ns), almost unlimited programming endurance (>1015 cycles) and zero standby power. The basic component of MRAM is a magnetic tunneling junction (MTJ). Data storage is realized by switching the resistance of the MTJ between a high-resistance state and a low-resistance state. MRAM switches the MTJ resistance by using a current induced magnetic field to switch the magnetization of the MTJ.
Recently, a new write mechanism, which is based upon spin polarization current induced magnetization switching, was introduced to the MRAM design. This new MRAM design, called Spin-Transfer Torque RAM (STRAM), uses a (bidirectional) current through the MTJ to realize the resistance switching. Therefore, the switching mechanism of STRAM is constrained locally and STRAM is believed to have a better scaling property than the conventional MRAM.
Steady current injection has been used to sense the logic state of MRAM. As the density of the memory devices increases, the length of the bit lines, source lines and word lines increase and add resistance to the circuit design. The added and variable resistance in the MRAM array complicates the sensing of the logic state of the individual memory units.